Bhasker, J., <br/><br/>
Verilog HDL synthesis :  a practical primer / 
J. Bhasker 
 - Hyderabad :  BS Pub.,  2001 
 - xx, 215 p. ;  24 cm. 
<br/><br/>Includes bibliographical references and index 
<br/><br/><label>ISBN: </label>8178000113 :  Rs. 195.00 
<br/><br/><label>Subjects--Topical Terms: </label><br/>Verilog (Computer hardware description language)<br/>Logic design--Data processing<br/>Computer hardware description languages
<br/><br/><label>Dewey Class. No.: </label>621.392