Architecture of Computing Systems - ARCS 2013  26th International Conference, Prague, Czech Republic, February 19-22, 2013. Proceedings /  [electronic resource] : 
edited by Hana Kubátová, Christian Hochberger, Martin Daněk, Bernhard Sick. 
 - Berlin, Heidelberg :  Springer Berlin Heidelberg,  2013. 
 - 1 online resource (XIV, 354 p. 146 ill.) 
 - Lecture Notes in Computer Science,  7767  0302-9743 ; .
<br/><br/>An Unstructured Termination Detection Algorithm Using Gossip in Cloud Computing Environments -- Power Monitoring for Mixed-Criticality on a Many-Core Platform -- On Confident Task-Accurate Performance Estimation -- Exploiting Thermal Coupling Information in MPSoC Dynamic Thermal Management -- A Multi-core Memory Organization for 3-D DRAM as Main Memory -- Synthetic Aperture Radar Data Processing on an FPGA Multi-core System -- Virtual Register Renaming -- Load-Adaptive Monitor-Driven Hardware for Preventing Embedded Real-Time Systems from Overloads Caused by Excessive Interrupt Rates -- Producer-Consumer: The Programming Model for Future Many-Core Processors -- A Highly Dependable Self-adaptive Mixed-Signal Multi-core System-on-Chip -- Inter-warp Instruction Temporal Locality in Deep-Multithreaded GPUs -- GALS-CMP: Chip-Multiprocessor for GALS Embedded Systems -- HW/SW Tradeoffs for Dynamic Message Scheduling in Controller Area Network (CAN) -- A Data-Driven Approach for Executing the CG Method on Reconfigurable High-Performance Systems -- Custom Reconfigurable Architecture Based on Virtex 5 Lookup Tables -- Profiling Energy Consumption of I/O Functions in Embedded Applications -- An Application-Aware Cache Replacement Policy for Last-Level Caches -- Deploying Hardware Locks to Improve Performance and Energy Efficiency of Hardware Transactional Memory -- Self-adaptation for Mobile Robot Algorithms Using Organic Computing Principles -- Self-virtualized CAN Controller for Multi-core Processors in Real-Time Applications -- Shrinking L1 Instruction Caches to Improve Energy-Delay in SMT Embedded Processors -- Arithmetic Unit for Computations in GF(p) with the Left-Shifting Multiplicative Inverse Algorithm -- HW-OSQM: Reducing the Impact of Event Signaling by Hardware-Based Operating System Queue Manipulation -- Comparison of GPU and FPGA Implementation of SVM Algorithm for Fast Image Segmentation -- Automatic Floorplanning and Interface Synthesis of Island Style Reconfigurable Systems with GoAhead -- Separable 2D Convolution with Polymorphic Register Files -- Architecture of a Parallel MOSFET Parameter Extraction System -- Predictable Two-Level Bus Arbitration for Heterogeneous Task Sets. 
<br/><br/><label>ISBN: </label>9783642364242 
<br/><br/><label>Subjects--Topical Terms: </label><br/>Computer science.<br/>Computer communication systems.<br/>Architecture, Computer.<br/>Software engineering.<br/>Operating systems (Computers).<br/>Information Storage and Retrieval.